AMD changes the focus on its CPUs: Zen 5 will have 2 types of Cores!

There is still more than a year to go before the launch of AMD CPUs with Zen 4 architecture, but time passes and if Intel can take pride and pride in its Meteor Lake AMD then it can do it with Zen 4D and Zen 5, but in a more subtle: via like-minded Youtubers.

We already told you in a news item a few days ago, AMD’s strategy is to also adopt the heterogeneous core policy for its PC CPUs, so Intel would have been the first to do it, but it will not do it exclusively. Just a few days later the cybercriminals of the network are repeating as exclusive what we anticipated through new rumors.

Cache L1 L2 L3 Zen 4

Well, the core Zen 4 with V-Cache has been baptized as Zen 4D or Zen 4 Dense, a name that really does not make any sense, since the name of Zen 3D comes from the fact that the use of the V-Cache makes it a 3D or 3DIC embedded chip. From what we know through the GIGABYTE document that was leaked a few days ago, AMD still would not have decided the amount of L3 cache to use in Zen 4, so they will be deciding between launching their CCD Chiplets with V-Cache or not.

Well, new “information” has appeared on the net about future AMD architectures.

Rumors about Zen 4D and Zen 5

Zen 4D MLID rumors

The new string of rumors has given new information about the Zen 4D core, which is nothing more than Zen 4 with V-Cache. Reportedly, the first CPU architecture to implement these cores would be Bergamo, the 128-core EPYC Zen 4, and it would be exclusive to this processor with a 16-core per chiplet configuration, which contrasts with the 8-core configuration that the Zen would have. 4 standard.

Apparently Zen 4D is a parallel development to that of Zen 4, which brings a new cache system, runs at a lower clock speed and sacrifices single-threaded performance to increase multi-threaded performance. The loss of support for AVX-512 instructions that in Ryzen CPUs will be a novelty in the fourth generation of the architecture. The date of the first CPUs with this architecture? Third quarter of 2023.

Zen 4D Zen 5 MLID

As for Zen 5, rumors speak of a CPI increase from 20% to 40% compared to the standard Zen 4 and whose launch will be approximately a year later. In addition, they speak of the addition of Neural Engines and heterogeneous configurations where the small CPU would be Zen 4D cores.

The information that AMD will prematurely abandon the AVX-512 makes us think that it is very possible that they have adopted the AMX units that Intel has added in their Golden Cove cores for Alder Lake-S and Sapphire Rapids.

Are these features possible?


First of all, we have to bear in mind that changing the entire cache system of a processor means having to create a completely new core. Secondly, we find it curious that Zen 5 coincides in its launch time with that of Zen 4D, a year after Zen 4 when between Zen 3D and Zen 4 there has been a waiting time.

We know that AMD has its answer to Intel Foveros in the form of its X3D technology developed in conjunction with TSMC and it is a fact that future AMD CPUs are not being designed so that the vertical cache is something optional, but an integrated part. Keep in mind that one of the problems when intercommunicating several cores is the infrastructure and a 3DIC configuration with the last level cache is an efficient way to solve the problem and that will allow CCD Chiplets above 8 cores.

Ringbus Zen 3

Regarding the use of the Zen 4D cores as the performance cores for Zen 5, which would bring a new cache system, they confirm in passing that both processors use the same system because in any multicore system, be it homogeneous or heterogeneous the LLC cache is shared, regardless of the architecture we talk about. Hence, we think that he is really talking about the same core.

What do we believe? Well, we don’t know first-hand due to the fact that we are obviously not Mike Clark and his team, but we can imagine two different scenarios:

  • L1 and L2 on each core, the L3 cache is found as LLC on the chip above instead of the CCD Chiplet making the V-Cache go from optional to integral.
  • An L4 cache is added to the equation.

Although there is a third scenario that nobody is considering.

Lite versions of the PS5 and Xbox consoles

PS5 Xbox

Both SONY and Microsoft have ordered versions of the APUs of their consoles from AMD manufactured under the 5nm node, which will allow them to make more compact, cheaper and more efficient versions for the user. Since the standards for TSMC’s 5nm node and 7nm node are different, this means porting Zen 2 from N7 to N5.

Is it possible that the efficient cores that we will see in Zen 5 are the Zen 2 for the Lite versions of the Xbox Series and PS5? It is, for AMD it is not a simple copy and paste and in the process they can support the Zen 2 cores for V-Cache, something that seems to be already designed. With regard to the heterogeneous core strategy, it is much better to have a large number of efficiency cores and therefore these have to be small rather than having large cores. More than anything, due to the fact that it seeks to execute the code in parallel.

For the moment we leave everything on the air and we will wait to see what happens, mainly due to the fact that officially Zen 4 has not been nor announced.

The post AMD changes the focus on its CPUs: Zen 5 will have 2 types of Cores! appeared first on HardZone.

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