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AMD doubles the L2 cache of its Genoa server processor

At the moment the Zen 4 architecture is just a promise on a slide and not an actual product. This will arrive, for the time being, in the form of the future Ryzen 7000 for desktops and the EPYC 7004 servers. Well, an old leak about the AMD Genoa L2 cache has been confirmed, which represents a change in something that had remained immovable since the beginning. first Zen.

The Ryzen 7000 will not be the only processors that we will see in the coming months with Zen 4 architecture, but the EPYC 7004, codenamed Genoa, are also expected to appear on the market. Well, we already had a leak about the architecture last year, which we discussed in a detailed article. Of course, there were always doubts whether the leaked documentation of the leak was correct, especially since the Zen 4-based CCD Chiplets had not yet entered pre-production and were in the final stages of design. However, with the confirmation of the L2 cache in Genoa, this information has been confirmed.

It is not the only news, since this indirectly confirms that both processors based on the Zen 4 architecture are in the penultimate stage. Since the information that we are going to comment on below corresponds to an engineering sample. Then come the quality ones where the chip is already in its final design, but it is not for mass production yet, and then obviously the chip that reaches our PCs.

AMD Genoa doubles the L2 cache and places it at 1 MB

We must bear in mind that one of the advantages for AMD in the manufacture of its desktop and server processors is that by dividing them by chiplets, this allows them to reuse certain parts. For example, the CCD Chiplets used to build the Ryzen 7000 will also be used to build the EPYC 7004 or Genoa. The difference? The number of chiplets and therefore total cores that will be in each processor.

AMD Genoa Lisa Su

Well, the latest information comes from the leak from Geekbench. Although this time, it is not a leak of results, but rather a reference to an engineering sample of a processor with 32 cores and 64 execution threads. For that reason alone we already know that it is not the Ryzen 7000.

AMD Genoa specifications Geekbench L2 Cache

What stands out about these specifications is the fact that AMD has doubled the size of the L2 cache per core from 512KB to 1MB, which is something that was seen in last summer’s document. Doubling the size of that level in the hierarchy means that there are more chances of finding a data in it than before and, therefore, the number of hits in the search increases.

The increase in the size of the AMD Genoa L2 cache means that the access time in that level has decreased compared to Zen 3. At the moment we do not know if the rest of the cache levels will be affected. Although from the outset we tell you not to rule out the implementation of the V-Cache for a potential Genoa-X.

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