- A performance per watt improved and significant generational, as well as an improvement of frequencies.
- An increase of CPI about him 8% and 10%.
- A fifteen% of improvement in Single Thread.
- up to a 125% higher bandwidth per core.
- Inclusion of ISA for AI and AVX-512.
But the data does not end here, since when AMD has talked about performance per watt, it has done so with a very specific data: +25%which translates into an overall performance improvement of no less than a 35% always compared with Zen 3, that is, with the Ryzen 5000. The comparison has been made based on a CPU of 16 cores and 32 threadswhich we understand will be the top of the range once again.
The remarkable thing here is that the IPC is lower than expected, but the performance increase in ST is as expected, on the other hand, while the general increase in 35% is awesome. Saying that AMD “marks an Intel” is synonymous with stating that the improvements in the architecture are not too great and that the performance is going to be achieved in large part by the incredible increase in frequency that we are going to see. Because AMD will raise between 700MHz and 1GHz the official clocks, we’ll see if they can sustain them and it doesn’t happen like with Zen 3.
On the other hand, AMD has not explained how many versions of Zen 4 will come to the desktop as such, although we assume that there will be at least two of them: Zen 4 and Zen 4 3D V-Cache, but Zen 4C? It is rumored that this version is focused on a higher number of cores and a lower frequency and therefore requires a denser node in terms of transistors.
Is this AMD’s game with the 4nm? It is possible that Zen 4 and Zen 4 3D V-Cache are launched in 5nm and either Zen 4C the one who reaches those 4nmperhaps for OEM or professional systems that do not want to spend more on servers, or perhaps we are facing the new generation of HEDT CPUs that will now be included in the mainstream range in this way, who knows.
AMD Zen 5, few details, but interesting
As for Zen 5, AMD has revealed only three key sections, which, on the other hand, do not really tell us much. And it is that following the policy of secrecy already typical of the red team, the three points that Mark Papermaster commented leave room for optimism:
- Improved performance and efficiency.
- Pipeline Front End redesigned.
- Integrated Optimizations for AI and Machine Learning.
What we can say about Zen 5 apart from what has been said is that it will also come in three different versions: Zen 5, Zen 5 3D V-Cache and Zen 5Cwhere in any case they will debut with the 4nm lithographic process and will be able to scale up to 3nm, where there should be a change.
This is curious, because Zen 4 makes the leap to 5nm, which means some interesting improvements in density, frequencies and consumption, to then move on to 4nm which are an improvement and evolution of these, while Zen 5 will do so at On the contrary: opt for the already mature 4nm and you will end up in a more advanced lithographic process such as the 3nm.
We understand that this is focused in this way by time and by volume of production given the delays of TSMC and surely the few wafers that it will have by 2024, where it seems that AMD does not want to get its fingers caught by betting everything on the 3nm Of start. As for the performance that we can expect from Zen 5, little is being said about it and although as we see AMD has not collected information, the reality is that this architecture has had an exclusive and parallel development since the presentation of Zen 3.
The changes introduced speak, according to rumors and the few pearls that AMD has left, of the company’s first heterogeneous architecture, something similar to what we have seen with Intel Alder Lake, except with chiplets. It is the opposite path to its rival, since Intel started with the architecture and then will add chiplets, while AMD has done it exactly the other way around.
So, Zen 5 will be the point of union when it comes to competition to even the cards between the two companies, and therefore the design of Zen 5 has been more exclusive.
As we can see, it’s all quite brief and a bit general, but this is part of a whole, which AMD has called Infinity Architecture, where Zen 5 fully enters into a global ecosystem that will be united by the Infinity cache to make a whole between various types of products.
AMD affirms that with this it would already be its 4th generation, understanding the first as the one that included RDNA at the time or the Ryzen. What will be achieved is a unified system that will integrate 2.5D and 3D chiplets manufactured by TSMC where there will be a unified coherent shared memory. On the other hand, and taking advantage of the purchase of Xilinx, the company’s extensions and other IPs will be integrated, at the same time as CXL 2.0 based on memory by desegregation.
Likewise, there will be products within this Infinity Architecture that will allow an extensible architecture for standards CXL 3.0 and UCIE. What AMD is trying to explain here is that its connection through chiplets and the use of them will be key to lower latency, greater consistency and lower power requirements thanks to the use of these chiplets in different ways.
Or put another way, there will be scalable and different products that will only change some chiplets for others, depending on the needs of the customer or market segment.