AMD Zen Turns Five: Past, Present and Future

I know what you are thinking, that the commercial debut of the Zen architecture occurred in the first quarter of 2017, and therefore not exactly five years have passed since the first processor based on that architecture was put on sale. You’re right, but AMD didn’t start from that date to celebrate Zen’s fifth anniversary, instead has gone back to an earlier stage development due to the importance it had within the company, and this takes us to the second half of 2016.

It is no coincidence, as many of our readers will know, Zen was in development for several years, and experienced two critical moments in 2015, date on which said architecture was revealed, and 2016, when the company confirmed that it had successfully manufactured the first generation Ryzen processors using the 14nm process. GlobalFoundries was in charge of “cooking” them, but AMD indicated that it could turn to Samsung if necessary (due to a high demand issue).

When AMD announced that it was working on Zen it did not raise too many expectations. At the time this was totally normal, we just have to remember that, by then, the Sunnyvale company was in a very delicate situation after the crash of the Bulldozer architecture, and dragged a major drought in the CPU sector. It had nothing to compete with Intel directly, not in the general consumer market or in the notebook sector, and not in the professional category either.

As we have already told you before, the situation in which AMD was found was so complicated that there was even talk of its possible purchase by a giant in the technology sector. Interestingly, Samsung rang very loudly, and maybe that would have been the fate of the Sunnyvale firm had he failed to find the right path with Zen, an architecture that exceeded all expectations, and that marked the beginning of a meteoric recovery that, still to this day, is surprising.

Past: Zen and the commitment to an MCM design

AMD was aware that he was not in an appropriate situation to address the issues – and the costs – of developing a complex, high-performance CPU architecture based on a monolithic core design, not only for all that it represented in its design stage, but also for what it meant to time to move it to the wafer. It needed a design that would allow it to compete with Intel again, but at the same time it could cope more easily, and at lower costs. The answer came from Jim Keller, and it was an MCM design.

MCM designs allow combine relatively simple chips to create more complex “super chips.” It’s not a new concept, but AMD was the first to dare to move it directly into the high-performance, mainstream x86 processor industry. It is obviously easier, and cheaper, to design and produce single chips and combine them to form a more powerful processor than to create that “super chip” outright and put it on the wafer.


However, this also posed a significant challenge, which is that by combining simpler chips to create a more powerful processor, you must find a way to interconnect those chips, and to fine-tune communications and the way of working of each one of them to avoid errors and latency problems. On the other hand, placing resources as important as the level 3 cache in different packages limits the total amount available to all cores.

In the end, AMD managed to shape a very competitive architecture. Zen couldn’t reach the level of IPC that Intel’s Skylake architecture offered, but it handily outperformed Bulldozer, managed to outperform Haswell. This important improvement in the CPI, together with the high scalability that allowed an MCM design, and at the low cost of this, were key for AMD to position its Ryzen 1000 series processors as an attractive product line for consumers.

AMD’s MCM design was based on the CCX unit, which integrated four cores and eight threadsThanks to SMT technology, it had 2 MB of L2 cache and 8 MB of shared L3 cache. To create an 8-core, 16-thread processor, AMD only had to put two CCX units together, greatly simplifying the design of the Ryzen 7 1700 and above. But this is not all, to get the most out of the chips on each wafer, AMD combined CCX units with non-functional cores. Thus, a Ryzen 5 1600 used two CCX drives, but with cores disabled. This was a great advantage for the Sunnyvale company, allowing it to get the most out of this new architecture.


Zen was a powerful architecture, but it was also scalable and highly profitable. AMD managed to offer 8-core and 16-thread processors for less than 400 euros, and these were able to maintain good single-wire performance. Frankly, no one imagined that that company that some gave up for dead was going to be able to give that blow to the table, but it did, and despite the fact that it had a slightly complicated debut due to support and memory compatibility issues. high-performance, in the end was the confirmation that AMD was back on track.

However, it did not take long for voices to emerge saying that the MCM design was a patch, and that it would not be viable in the long term. AMD partially silenced those rumors when it launched, just a year later, Zen +, a revision of the original architecture that made the jump to the 12nm node and kept the CCX unit as a base, although it introduced various small improvements in both cache-level latencies and high-speed RAM support, and also in the intercom system of the CCX units, known as Infinity Fabric. The Ryzen 7 2700X was the flagship processor of that architecture.

If you want to delve into the differences that exist between Ryzen 1000, Ryzen 2000 and Ryzen 3000 processors I invite you to take a look at this article.


Present: Zen 2 and Zen 3 achieved what seemed impossible

Let’s face it, even though AMD had done a good job, it still didn’t outperform Intel when it came to performance. Even after the arrival of Zen +, negative opinions continued to emerge saying that an MCM design was never going to outperform the raw performance of a monolithic core processor. The truth is that, at that time, the data that showed the comparisons and the problems of the MCM design They pointed in that direction.

However, AMD was very clear about the way forward, and with the arrival of Zen 2 it gave us a huge surprise. This architecture abandoned the classic design of the CCX to introduce an element that is still the central pillar of its CPUs today, the chiplet or CCD unit, composed of two CCX units that add a total of 8 cores and 16 threads, thanks to SMT technology, it integrates 4 MB of L2 cache in total (512 KB per core) and has 32 MB of L3 cache. This L3 cache is divided into 16 MB accessible by each quad-core block, that is, by each CCX unit.


The chiplet is manufactured in a 7 nm process, TSMC is in charge of “cooking” it, and the entire I / O subsystem is outsourced to one chip which is manufactured in 12nm process. With Zen 2, AMD made a huge leap in single-threaded performance, managed to raise working frequencies, improved compatibility with high-speed RAM memory and was able to scale the maximum of cores and threads up to a maximum of 16 and 32, thanks to the union of two chiplets in the Ryzen 9 3950X. The formula of combining chiplets, and using units with non-functional cores to create configurations of fewer cores, was maintained, and with it the high profitability and competitive prices.

Zen 2 was a huge step forward, but AMD still did not beat Intel in single-wire performance, a reality that changed with the arrival of Zen 3, the architecture that gave life to the Ryzen 5000. This architecture kept the chiplet as the central pillar, and also the external I / O chip and the 7nm and 12nm node, but it introduced major changes that allowed AMD to finally outperform Intel in terms of IPC.

AMD Zen 3

Among the most important changes are the unification of the 32 MB L3 cache, which are now accessible by each 8-core block (no longer divided into two 16MB blocks), as well as other modifications to the jump predictor, front end, and runtime.

AMD also managed to raise the working frequencies a bit, stayed true to the principle of backward compatibility that it announced with great fanfare when first-generation Zen arrived, and designed a state-of-the-art platform, compatible with the PCIE Gen4 standard. It was a huge leap, there is no doubt about that. AMD was ahead of Intel in both single and multi-threaded performance, but the price of the Ryzen 5000 increased significantly, and this made them lose value in price-performance ratio compared to the Intel Core Gen10 and Intel Core Gen11.

AMD Zen 3

Future: Zen 3+ and Zen 4 will be the next news from AMD

The Sunnyvale company has confirmed that it plans to launch Zen3 + in the first quarter of 2022. This architecture will maintain the base of the current Zen 3, but with a peculiarity, and that is that it will use improved CCD units, and will have 3D stacked L3 cache. We already had a chance to talk about this topic recently in this article, and we saw that performance could be increased between 4% and 25% in games (15% on average).

In total, the L3 cache expansion that Zen 3+ will offer thanks to vertical stacking will be 64 MB, which means that a version of the Ryzen 7 5800X adapted to that architecture would have, in total, 96MB L3 cache, while a Ryzen 9 5950X would have with 128MB L3 cache. They are dizzying figures, especially considering that until a few years ago having 16 MB of L3 cache was already a breakthrough.

AMD Zen 3

Zen 3+ will be a major generational refresh at the performance level, but it is not expected to introduce any improvements at the platform level, and it shouldn’t require a new motherboard either, which means that, in principle, it should be compatible with current AM4 motherboards equipped with AMD 500 series chipsets.

Zen 4, however, will need a new motherboard, as it will use the AM5 socket, it will be compatible with DDR5 memory and also with the new PCIE Gen5 standard. It is expected to be manufactured in 5nm process, and that it increases the maximum number of cores and threads of the current generation. Its launch will occur sometime in 2022 (probably at the end of that year), and will compete with the most advanced that Intel has at that time.

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