Right now NVIDIA is the absolute queen of the market in HPC graphics cards, mostly because of the lack of competition, but the lack of opposition is over as soon as Intel and AMD have released their answers in the form of AMD Instinct MI200 and Intel Ponte Vecchio.
The particularity? The fact that on top of the Interposer there is not a single GPU, but two of them. In the case of Intel, they have used the EMIB and Foveros technologies of those in blue, but in the case of AMD, being a Fabless company, they have used the CoWoS-S technology of TSMC in its latest version.
Well, TSMC’s CoWoS-S technology was also used by NVIDIA for the creation of its HPC A100 GPU, which we remember that unlike those used in the GeForce Ampere has been manufactured in TSMC under the 7 nm node of this foundry.
Can we see an NVIDIA A100 Dual?
While rumors speak of NVIDIA’s return to TSMC under the 5nm node with the Lovelace architecture, the big question is whether they have a response to your rivals in the HPC market that I use the same CoWoS-S packaging than the AMD Intinct MI200.
The NVIDIA A100 is a huge GPU with an area of 826mm2, so it is at the grid size limit that can be used to make a chip, and therefore NVIDIA cannot make a bigger GPU. Although if we make an observation to the diagram of the A100 we will see how the L2 cache is divided into two blocks. This is because the A100 by itself can be seen as two GPUs integrated as one.
If TSMC’s CoWoS-S technology is used, then each of the GPUs on top of the interposer cannot exceed 600 mm2 area if used a dual configuration, but the total is higher than what is achieved with a monolithic chip. This allows NVIDIA to consider a future HPC GPU with a higher number of transistors and a configuration not with 6 HBM2e modules, but with 8 modules of the same memory.
However, 2022 is also the year in which the high-performance chips manufactured under TSMC’s 5 nm node will appear on the market, and with this it is possible that the company with the green logo will give a blow to the presentation. of a more than rumored and expected architecture, which would rule out the idea of an A100 Dual by NVIDIA.
But then, are we talking about the first NVIDIA Hopper implementation?
Obviously NVIDIA will make changes to its shader cores, within the well-known SM. We will most likely see a new type of Tensor Core and more so now when Intel has taken out its chest with an XMX that are twice as fast as their current equivalents in NVIDIA. We do not know if NVIDIA will adopt the Int32 / FP32 switched unit that the GeForce Ampere has, but not the A100, in any case all those changes would be enough to talk about a new architecture.
It is more than possible that the A100 Dual we are talking about is neither more nor less than Hopper, since if so then it would make sense for the triumphant return to TSMC under the 5 nm node to be given. Obviously we cannot forget that the 600 mm limit2 of area will continue to be, but with a node that has a density 1.8 times higher than the one used in the current A100.
So NVIDIA may have its hit on the table to maintain the lead in the GPU market for high-performance computing and artificial intelligence, they surely haven’t stood idly by to see them coming.
