For some time now, CPUs have been integrating other elements inside until they literally become heterogeneous chips that not only literally integrate the processor, but also the memory controller, the integrated graphics and other elements. As well as communication with peripherals. Well, this last point is important to understand why PCI Express 5.0 is so important in the future of the PC.
The problem of physical interfaces
In hardware we call PHY any interface that communicates a chip with another chip externally, be it logic with memory, memory with memory or logic with logic. They are usually located on the periphery of the chip. The problem with them? No matter what manufacturing node we are using, these do not scale with each new manufacturing process, so it is necessary to find a way to need simpler interfaces.
One of the most used and at the same time least known pieces is what we call a SerDes or Serializer-Deserializer, which consists of an electronic device that can take a signal transmitted through a pin or connection, that is, in series, to transmit the same on several pins or connections in parallel. For example, what the motherboard chipset does is concentrate several interfaces at low speed and then concentrate them on a PCI Express connection that is at the other end.
Now, if we look at all the existing connectivity for the future, we will see how, apart from the use of the NVMe SSDs that are directly connected to the processor and the USB4 connections, the rest of the interfaces will see their impact on the connectivity of the motherboard reduced. Especially due to the arrival of PCI Express 5.0 and later. In other words, it is very likely that we will stop seeing chipsets using 4 PCIe lanes to use much less, which will greatly simplify the motherboard.
And what does this have to do with PCI Express 5.0?
The problem is that chips have been getting much more expensive per area for a long time, so if you want to maintain prices you have to try to make them smaller and this ends up completely affecting external interfaces. A clear case is found in the PCI Express 5.0 lanes of the processor that are intended to communicate with a 5th generation NVMe SSD. Is a 14 GB/s drive really necessary? No, at this point it is not and it is a specification that far exceeds what is necessary.
That is why you can create a SerDES that converts the signal from the 4-pin PCI Express 5.0 into 8-pin PCI Express 4.0, which is ideal for having two M.2 drives on your PC. Most users will not use more than two drives in the PC and with this we stop needing the chipset to have to grant connectivity to an additional drive apart from the first. Everything from the processor and thus avoiding that laptops are not limited in many cases to a single unit.
The other case with motherboard chipsets, which concentrate the majority of low-speed interfaces. These could go from using 2 pins instead of 4, slightly reducing the size of the CPU, however, it will not be the only benefited component.
Fewer pins needed for graphics card
The same thing that we have explained to you with the NVMe SSDs can be done with the graphics card, but this time not for a dual configuration, but so that 8 PCI Express 5.0 pins become 16 of the fourth generation to connect the graphics card. At the moment, not even the RTX 4090 ends up suffering a bottleneck due to the use of said interface and believe us that in the mid-range we will see models that are much less powerful than said GPU.
As you can see, a 16-pin PCI Express 5.0 interface from the CPU is not necessary, an 8-pin interface is enough and this will help reduce the size of the chips or simply focus said space on the periphery to other elements such as support for RAM with ECC or who knows if a greater number of memory channels.
