PCI-SIG has released the final, full, version 1.0 specifications for PCIe 6. It is the last step to certify the solutions that will arrive in the future for this new standard of the local I / O bus, the most important currently in PCs.
Street users continue to use PCIe 3.0 equipment in the majority, although the adoption of PCIe 4.0 has advanced in the last two years and is used by SSDs and graphics cards. PCIe 5.0 has just hit the market thanks to Intel’s Alder Lake platform and in the short term AMD will also support it. But there are no consumer components available yet. Solid state drives are supposed to be the first to arrive and then the next generation of dedicated graphics. But the development of the technology industry does not stop and new standards must be advanced.
Is what he just did PCI Special Interest Group (PCI-SIG), the body responsible for a bus that has become ubiquitous in personal computers. PCI Express (which you will see abbreviated as “PCI-E” or “PCIe”) is used both for internal connection in the integrated circuits of the motherboards (chipsets) and to connect external cards or modules punctured in the corresponding slots. Its possibilities are enormous. Everything can connect to this bus and in the future it will become the only one of its kind, leaving behind the old ISA, AGP, the original PCI or a SATA less and less used.
The new version of the standard will arrive with a long delay compared to what was initially planned. It has been in development for at least three years and the published drafts with its specifications have been varied. The main advancement of PCI Express 6.0 over previous versions of the standard will be a substantial performance increase to a bandwidth of 256 GB / s in full duplex, doubling that of PCI Express 5.0 and quadruple that of PCI Express 4.0.
This is achieved by doubling the data rate of a PCIe lane, taking it to 8GB / second in each direction, and much, much more for multi-lane configurations. With a frequency of 64 Ghz, you can offer up to 64 Gigatransfers per second. In addition to the performance increase, a lower latency, superior RAS capabilities, or I / O virtualization enhancement to meet increasing industry needs.
The new PCIe 6 interface changes the encoding scheme to PAM4 to increase transfer rates. It is what truly enables the specification to achieve such high bandwidth. Technically, it modulates signals at four levels, packing two bits of information into a serial channel in the same amount of time. This PAM4 scheme is widely used in higher performance networks such as enterprise InfiniBand and we have also seen it in GDDR6 group graphics memory.
In terms of channel reach, that is, the “distance” it can travel, it remains similar to that of the PCIe 5.0 interface and is critical to ensuring broad industry acceptance. Another improvement will come from smaller physical size of the bus, which should allow the production of smaller cards and not the monstrous sizes that we can find – for example – in today’s high-end dedicated graphics. This if more efficient cooling systems are achieved, it is understood.
PCIe 6 will not start on PCs. As is often the case with new standards, it will initially focus on solutions for data centers, industrial, automotive, military and aerospace applications. Until 2023-2024 it will not be released on servers, so probably won’t reach consumers for a few years. And as we said it is not necessary either. There are no components that take advantage of PCIe 5.0 and PCIe 4.0 is still a minority among the millions of boards and components that use PCIe 3.0.
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