The dark secret hidden inside your RAM memory modules

If there is something that we find confusing for the novice user, it is the fact that it is necessary to use a dual channel configuration to get the most out of it. Obviously, this is a maneuver created to sell more memory kits, for this reason the standard has not been improved. However, due to the issue of environmental impact, it is becoming worrying, a single device does not make a difference, but hundreds of millions do.

It’s time to move on from the format of DIMM memory modules

Since time immemorial as far as computing is concerned, all the modules that exist on the market are DIMM memory, regardless of the number of pins or contacts we are talking about, there are always 64 of them for data transfer, so Hence the buses are 64 bits per pair of sockets, since the second shares a data bus with the first, but not addressing. So, this means that manufacturers have had to rely on advances in manufacturing nodes to increase the speed of RAM.

The problem, however, comes when we realize that, like what happens with other chips, RAM requires more and more electrical power. It becomes more efficient based on its data transfer capacity, but not on the total it transmits. And all this due to the fact that it depends on voltage and clock speed, and here we have to start from the following:

  • The power consumed depends on the frequency multiplied by the capacitance, which is a constant that does not vary, and by the square of the voltage.
  • The higher the voltage, the higher the frequency that can be reached.

However, there is a way that would not increase power consumption, but would involve using wider sockets to allow for memory modules with twice the width of the bus.

The CPU bus is 128 bit

And that is regardless of whether we are talking about Intel or AMD, the bus has not changed and has allowed the use of two DIMM sockets on motherboards. The ideal would be to be able to double the bandwidth to 256 bits. Unfortunately the communication, the RAM is in the periphery and this would mean having to increase the average size of the CPUs and although the consequences of this is having more space for more elements, it is counterproductive, since you add a greater intercom latency and lower clock speeds for each core.

The hidden war that nobody talks about: LPDDR versus DDR

For us, the ability to replace and expand the RAM is much better than using soldered mobile memory, unfortunately the current LPDDR5 has nothing to envy to the DDR5 in performance, what’s more, thanks to its greater energy efficiency it can achieve higher clock speeds and therefore somewhat higher bandwidth than the desktop solution. Of course, the handicap is that it is welded.

And isn’t it possible to solder LPDDR5 memory to a DIMM PCB and have a single memory standard? Not in vain, the DDR5 could also be soldered to the board and its operation would be the same, the memory modules are the same as the PCBs of the graphics cards and the M.2 SSD expansion cards. It doesn’t matter what you put on top of the PCB. Now, you will wonder why mention this in the middle of the subject of the future of memory modules.

Well, the explanation is that the number of chips in the DDR5 modules is greater than in the LPDDR5 and that is an additional cost, since each chip has to be tested and encapsulated. That is why many low-cost PC manufacturers go for LPDDR5. The fact is that today it would be possible to create a “QIMM” module with a 128-bit bus made up of 4 LPDDR5 chips in a row.

LPDDR4 on board

The JEDEC mafia with the memory modules

Arriving now at the conclusions, it is clear that the biggest mistake of the JEDEC has been to limit the bandwidth of the memory modules to 64 bits and to maintain this standard for a long time, while making two types of memory compete. each other, but denying the ability to install LPDDR5 in RAM modules. Since if this happened, then DDR5 would stop making any sense.

Just like we saw the evolution from SIMM to DIMM modules, we should have seen the evolution to QIMM modules from 64-bit to 128-bit long ago. Although here we come to the crux of the matter and that is that in that case, unless the CPU bus will go from 128 bits to 256 bits, this would mean selling half of the memory kits today where they have to be purchased in pairs for good performance. Let’s not forget that JEDEC is not an independent body, but rather the memory manufacturers themselves agreeing on standards, availability and prices.

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