News

The first laptop with RISC-V processor, ROMA, already in presale

The first laptops running under the RISC-V instruction set are already in presale phase. According to Phoronix, this equipment, which its manufacturers, DeepComputing and Xcalibyte, have called ROME, will be developed in China, and only 100 units will be available. They have all gone on pre-sale already.

These laptops feature a quad-core RISC-V processor, up to 16GB of RAM, and a maximum storage capacity of 256GB. They will be compatible with RISC-V systems and with most Linux distributions. Of course, they will not be intended for the general public. The ROMA Laptop is intended for developers using the RISC-V instruction set for application development.

ROMA will employ a 12 and 28 nanometer (12/28nm) SoM package. The processor will have four cores, as well as a GPU and an NPU for work with design in two and three dimensions and acceleration by Artificial Intelligence. Each ROMA kit will be accompanied by a unique NFT, and those who want to get their hands on one can have manufacturers engrave their name or company name on the kit. For now, the prices that the equipment will have are unknown.

RISC-V is a relatively old instruction set by today’s standards, but it has only recently been adopted by the computer industry. It has many advantages over other more widely used instruction sets such as x86, AMD64, or ARM. which the main one is a completely open source license. This means that anyone who wants to can use its architecture. In this it is very different from x86 or ARM, which need commercial licenses and payments to the companies that offer them to get hold of the technology and be able to use it.

From a performance point of view, the feature that sets RISC-V apart the most compared to x86 and AMD646 is the use of a simpler RISC architecture than CISC. The first is based on the idea of ​​using simple instructions completed in a single clock cycle. The disadvantage of this technique is that need more code to complete an executed taskbut in return allows to get more energy efficiency Y longer battery life. ARM chips also use RISC instead of CISC to improve battery life, but with a rather different implementation.

CISC is the opposite of RISC. Your goal is to complete tasks with as few lines of code as possible. This leads to instructions being completed in multiple clock cycles very often. It therefore consumes more power, but requires less code.

The RISC-V architecture can be used in the consumer market without any problem, but competition from others has caused it to be relegated to the professional world. Almost all chips that are developed with the RISC-V architecture are intended for systems that deal with high-level computing tasks, such as high-performance computing or Artificial Intelligence. Only now does it seem that it is reaching consumer computers, specifically laptops, but it will be necessary to see if, in addition to developers, equipment for the general public begins to be assembled, something that is perfectly possible.

Related Articles

Leave a Reply

Your email address will not be published. Required fields are marked *