One of the peculiarities of Intel is its vertical integration where it is a designer and manufacturer of chips at the same time. This allows your architects to work closely with engineers who are dedicated to creating new manufacturing processes not only to create Full Custom libraries of future nodes. Because of this as a company it allows them to design future CPUs and GPUs around such advancements.
Let’s see, therefore, what technologies have been presented by Intel at this year’s International Electron Devices Meeting
Intel at IEDM 2021
The time that exists between starting the design of a processor until it reaches our hands so that we can use it is long in time. Although we are used to seeing a continuous release cadence by various manufacturers, the design time can take up to five years in total and more in companies that use Full Custom libraries to design their processors, such as the company founded by Gordon Moore.
So Intel at IEDM 2021 has spoken about the three goals for the future, which are:
- Essential technologies for scaling: which is related to Moore’s Law and thus allows for the largest number of transistors per area, although this requires the development of new types of 3DIC and 2.5DIC packaging. As well as the use of new types of transistor.
- The second point they are going to focus on is improving energy consumption in information communication, one of the biggest challenges today in the design of new processors.
- Creation of new concepts such as the use of new types of switches, use of electromagnetic mechanisms and even quantum computing.
All these technologies that we will talk about below, therefore, we will not see them in the short term in Intel’s portfolio, but they are a preview of what the future awaits us, both in the medium term and in the distant future.
IEDM 2021: Foveros Direct HBI, 3DIC and GAA
One of the keys for 3DIC packaging is none other than increasing the number of interconnections in the vertical connection between chips. Since with a large number of connections, very high bandwidths can be reached with a low clock speed and, therefore, with very low voltages.
Intel’s 3DIC intercom technology is called Foveros, which will arrive in its first generation on HPC Ponte Vecchio GPUs, while Foveros Omni and Foveros Direct, which allow up to 10,000 contacts per square millimeter, are found on next-generation and the first of them is already being used in the development of future products, so we should expect the use of both for the processors under the Intel 4 node.
The other point related to the creation of 3DIC chips that Intel has shown in the IEDM has to do with the use of GAA transistors. For this they will use their Nanoribbon technology, which will consist of NMOS and PMOS semiconductors whose doors are wrapped around ultra-thin channels on all four sides. Intel expects the density of the 3DIC chips to be between 30 and 50% higher when using transistors of this type, a figure much higher than what they would achieve with the use of FinFET.
This type of transistors will not make use of the Intel 4 node, although they will make use of later manufacturing nodes and we cannot ignore that the future of CPUs and GPUs involves the creation not only of structures based on chiplets, but also on the use of 3DIC, either to communicate logic to logic or logic to memory.
GaN and FeRAM Power Switches as eDRAM
Another novelty that Intel has shown at IEDM 2021 is related to the presentation of the so-called GaN (Gallium Nitride) Power Switches. The work of these pieces? They are placed on the PMOS transistors inside the GAA gates to supply the voltage. At the moment they are designed to work as high voltage modes, so they are especially designed for integrated radio frequency.
Nor can we bypass the embedded memory implementation by making use of ferroelectric RAM or FeRAM. Which allows the creation of memory with a density much higher than SRAM, but without the problems of DRAM in terms of speed. The speed of this memory? Well, we are talking about 2 nanosecond latencies, a latency equal to that of current latencies with first-level caches.
MESO and the transition beyond MOSFET
With the entire sector investigating quantum computing to go beyond the limits of silicon, it is not surprising that Intel is developing technology of this type that it can manufacture using CMOS technology that has been used for several decades to create new processors. .
And to finish we can talk about the MESO logic, which uses magnetic spins as transistors. Intel’s goal with such technology? The creation of a type of transistor located between the semiconductors of today and future and still distant quantum computers.
Of course, Intel also conducts research in areas that have very little to do with functions that we are familiar with. These are fundamentally new techniques, such as MESO logic, which views magnetic spins as a type of transistor. This torque logic should allow for entirely new methods of building a transistor and ranges between today’s semiconductor technology and what quantum computers implement.
