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This will be the common architecture of AMD, Intel and NVIDIA CPUs

NVIDIA in recent years has left the capital to buy two companies that are crucial for the future. From the first one, Mellanox, its technology has already been 100% incorporated into Jen-Hsen Huang’s company portfolio. The second, which is ARM, has not yet been approved for the purchase. On the other side of the ring we have AMD having acquired Xilinx and Intel putting all their meat on the grill with their dedicated GPUs.

All of them have made a series of strategic movements in recent years that go towards a common architecture, but which for the moment is unprecedented. Which consists of combining CPUs and GPUs on the same chip or set of them with a SmartNIC in the central part.

What do we understand as processor architecture? Well, the way in which its internal elements are organized, communicate with each other and that therefore affects its function. And it must be said that we have several indications that the architectures of both AMD and NVIDIA and Intel have several points that make us think that differences apart we are going to see a future common architecture. Let’s see which one and what differs from the current one.

The future of hardware for AMD, Intel and NVIDIA

CPU NPU VPU Render Road Ma

The key to the future of hardware is the transition from SoCs to NoCs. Of which we have already spoken to you many times, they are nothing other than SoCs or multichip modules. MCM, where the part in charge of managing the communication between the different elements is carried by an intelligent network controller or SmartNIC. Which is a processor in charge of moving data from one processor to another without them having to do so, which is an important paradigm shift.

The only time we’ve seen this on home systems was on the PS3’s Cell Broadband Engine, where the different cores connected to each other using a mechanism called MFC in each of them to communicate. The concept of the central SmartNIC however does not place this unit in each core, but in the center. The SmartNIC is designed to carry out memory movements with less delay and consuming less power. Which is key in the design of new architectures. So the concept is simple, in the future instead of being the processors the ones that access the memory of the system, what they will do will be requests to the SmartNIC, which will be the one in charge of making all those accesses for the processors.

However, SmartNICs do not have to be programmed by software developers, since they will function as specific processing units to perform the task of internal and external intercommunication between the different elements that make up the SoC or the chiplet-based MCM. With the advantage that they scale much more easily. Since today, for the three companies, the construction of new processors under common architectures, but with different configurations, is a nightmare when having to design the infrastructure that interconnects the different elements.

NVIDIA DPUs and Intel and AMD FPGAs

NVIDIA MELLANOX

As we have said before, the future of hardware goes through a series of movements made by the big three companies. Starting with the purchase of Mellanox by NVIDIA, it aims to replace the central intercom of its GPUs to place a DPU, which is nothing more than a commercial name for what is the technology of Mellanox SmartNICs. As for Intel and AMD, this is achieved through the use of an FPGA, but we cannot forget the recent presentation by the blue giant of its IPU or Infrastructure Processing Unit. In the specific case of AMD we have the case of the FPGA of Xilinx, which the company preconfigures to function as SmartNICs.

NVIDIA GTC 2021

Although the one that is clearest about these changes is NVIDIA, its roadmap is clear about the incorporation of this technology in its GPUs. Which we could see carried out for the first time in Lovelace and would be the reason why NVIDIA would have managed to place the huge number of CUDA cores and therefore SM in its future RTX 40. Where it is said that the number of CUDA “cores” It will become 18432, a figure that if the amount of them does not vary with respect to the current RTX 30 we would be talking about a total of 144 CUDA cores, double that of the RTX 2080 Ti and with four times more calculation units.

The advantages of adopting this technology are clear. In the first place, it allows us to control the quality of service when transmitting the data to the different client processors and allows us to create data management protocols for more advanced communication in the application. In addition to being more scalable than conventional intercom interfaces. Since the SmartNIC is in charge of managing the sending and receiving of all packages, ensuring that their transport and routing is light and fast.

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