The world’s largest foundry or chip factory, Taiwan Semiconductors, is seeing its dominance threatened by Intel’s announcement of wanting to compete with the Asian foundry and Samsung’s new nodes. So TSMC has developed N4P, a new manufacturing node in order to attract more and more new processor designs.
There is no doubt that there is a special race between the big three foundries where new manufacturing nodes are created for future chips, the objective is to get the great designers in the different segments of the hardware market to design their future products in those new processes. This market is so important that it has also become a strategic market for manufacturing countries and at this time Taiwan with its foundry TSMC has become the market leader after the mishaps of Intel with its 10 nm node, now renamed Intel 7, but in a highly competitive and short-time market there is no pause.
TSMC presents its N4P node
The Taiwanese foundry has just introduced a new chip manufacturing node in its portfolio. Under the name of N4P TSMC has just presented a manufacturing node that will share space with nodes N5, N4 and N3 of the same foundry. its about a process compliant with node N5 design rules, and therefore it will be able to be used to manufacture the same processor designs.
The N4P node is therefore a intermediate node, which is itself an improved version of the N4. CPUs and GPUs manufactured under this node will have a 11% improvement in clock speed compared to the same part manufactured under node N5 and 6% compared to N4. At the same clock speed and compared to N5 the new N4P node a same c chipwill consume up to 22% less and all this occupying a 6% less space. They have also talked about improvements in the manufacturing process, and these come in a reduction in the number of masks, which will speed up production time and therefore
The launch date of the new node? TSMC expects N4P to start manufacturing in the second half of 2022, so it will serve to launch more energy efficient versions of the designs for TSMC’s 5nm node. Given the high deployment costs of a new chipmaking technology, it is clear that the big contracts are already done. Are we on the trail of more efficient versions of Zen 4, RDNA 3 and RTX 40 by 2023? Who knows.
TSMC intermediate nodes
The intermediate nodes allow the use of designs from a previous node under a more advanced manufacturing process and therefore launch versions with better technical specifications and performance of CPU, GPU or APU that already exist in the market. TSMC’s N4P manufacturing process is one of these.
TSMC’s general strategy for quite some time has been to create intermediate nodes between its large nodes to offer customers whose products do not require a full node jump a more technologically advanced version than the current one. This was the case of the 12FF which was an advanced version of its 16FF node, also of the current N6 which is an optimized version of the N7 that uses part of the technology of the N5 and obviously the future N4 and its variant N4P.
The reason why these manufacturing nodes exist is for a fact, if you want to port a design from a current node to a more advanced one, the entire chip has to be completely redesigned because the design standards change. In many cases to cover certain market segments it is better to opt for an improved version of current technology. The problem is that the manufacturing node used by the original models can be a limitation in density or number of transistors, clock speed, consumption or any of the above in combination.