We have already spoken to you several times about Intel’s return to the market for HEDT processors with Sapphire Rapids-X, but it turns out that there are important news about what has already been renamed as Xeon Workstation such as its technical specifications and the number of cores that will integrate . Let’s see how Intel’s response to AMD’s Threadripper looks like.
The HEDT PC market is in a strange limbo, as for the vast majority of professional users the power provided by a high-end desktop CPU is good enough for their needs. What has caused this? Well, on the Intel side we have not noticed a processor of these characteristics since the launch of Ice Lake-X in 2020.
The launch of the Sapphire Rapids-X is expected in 2022, which is also codenamed Fishwalk, a version of the next Intel Xeon designed for workstations. We already knew about this processor, but it has been in the last few hours that new details have been leaked.
Xeon Workstation, Intel’s return to HEDT
The launch of the Xeon Sapphire Rapids could occur in the third quarter of 2022, both in its version for servers and data centers, as well as that of workstations. Despite being based on the same architecture due to the fact that they are aimed at different markets, they will use different sockets and commercial names, coinciding in the use of Xeon for the name, however, it adds the surname Workstation for the HEDT models. The rebrand is important, as this means that it is not going to be called Sapphire Rapids-X, which means the end of an era for Intel.
And what is the configuration of the first generation of the Xeon Workstation? As in the Intel Core 12 for desktop and the Sapphire Rapids for servers we will have the use of Golden Cove cores such as P-Cores, although unlike the CPU with Alder Lake-S architecture we will not see the use of E-Cores. And what do the specifications say? Well, up to 56 cores at a speed higher than 4 GHz, divided into 14 cores for each of the 4 tiles that make up the CPU.
However, each of the four tiles seems to have the memory controller shortened compared to the server version, since there are 8 DDR5-4400 channels with ECC support. Let’s not forget that DDR5 is dual channel memory per DIMM, so this is a total of 4 DIMMs per board. The other cut is related to the implementation of some units such as the Data Streaming Accelerator which, according to rumors, will be exclusive to the server version.
They will also have a cheap version
Rumors suggest that versions with 28 and 36 cores will appear, so we could see configurations of 2 and 3 tiles in total. For these versions the number of memory channels will continue to be 8, but they will lose support for ECC memory, although they would still be in the design phase and internally 4 channels with support for error correction would have been proposed. Since the number of channels is related to the number of tiles, it is logical to think that depending on the configuration it will be variable.