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NVIDIA could have finished the design of Hopper, its GPU by chiplets

High-performance GPUs are changing as they are evolving from monolithic chips to multi-chip designs. We have the case of the following AMD CDNAs with Aldebaran architecture that are composed of two GPUs connected to each other, but the maximum exponent is the Intel Xe-HP and Xe-HPC that will also be GPUs composed of several chips. Which is not to be confused with multiple GPUs in one MCM.

And what about NVIDIA? Well, it seems that its GPU architecture based on chiplets codenamed Hopper could be finished by now without design. Let’s see what the details are.

The NVIDIA Hopper would have reached the end of its design phase

We started hearing about the NVIDIA Hopper architecture more than two years ago. This is actually the first time we have heard of a GPU broken down into several chips or chiplets in an MCM configuration. Something that at that time seemed like an exotic solution, but with the imminent departure of AMD CDNA 2 and the Intel Xe-HP and Xe-HPC it is no longer something that seems like science fiction, but it is a clear trend.

Well, yesterday a certain Greymon55 who has become famous over time when filtering the road maps AMD has let go that NVIDIA Hopper after a long time, had passed the design phase prior to prefabrication and therefore the final architecture would have been finished. Given Lovelace’s existence as the rumored architecture for the RTX 40, Hopper is expected to go into the high-performance computing market. Being the successor to the A100 chip, which was launched in May 2020. So we would be talking about a two-year cadence.

The launch would therefore coincide with the launch of Lovelace, which is said to share TSMC’s 5nm node in its manufacture. As with HPC GPUs and NVIDIA gaming GPUs, these could have substantial differences in terms of their internal organization.

Is it really a new architecture?

CUP-GPU

The answer is that we still don’t know, but a few months ago there were references again to an MCM GPU design by NVIDIA, specifically in a paper where they christened it COPA-GPU. Since Hopper is the only future NVIDIA architecture that we know of of this nature then it is clear that Hopper was referenced in the paper. The main novelty? The addition of an additional level of cache in memory organization.

NVIDIA-GA100-GPU-Block-Diagram-Ampere

At the same time, the current A100 chip used in the NVIDIA Tesla has a curious organization, since it is internally organized as if they were two GPUs on a single chip. Which is clear from the fact that its L2 cache is separate. If we stick to the design of the COPA-GPU then NVIDIA would have added an additional level of cache, a move also adopted by AMD and that would allow a fluid and coherent communication between the different chiplets that would make up the GPU.

According to Kopite7Kimi, who has proven its reliability when it comes to leaking information from NVIDIA months in advance. You already talked about the configuration that Hopper will have, which represents a profound change from the internal organization that NVIDIA GPUs have for generations. Which until now was GPC → TPC → SM to become GPC → TPC → CPC → SM. This would indicate a composition of 8 GPC, 3 TPC per GPC, 3 CPC per TPC and 2 SM per CPC. Which would indicate a total of 144 SM for each chiplet in Hopper. In any case, we have yet to wait for the final information from NVIDIA. But it seems that Hopper’s design has already been completed, now you just have to wait for his presentation.

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